| 611 | -- | 624 | Qinghua Liu, Malgorzata Marek-Sadowska. Semi-Individual Wire-Length Prediction With Application to Logic Synthesis |
| 625 | -- | 636 | Rupesh S. Shelar, Prashant Saxena, Sachin S. Sapatnekar. Technology Mapping Algorithm Targeting Routing Congestion Under Delay Constraints |
| 637 | -- | 650 | Tung-Chieh Chen, Yao-Wen Chang. Modern Floorplanning Based on B:::*:::-Tree and Fast Simulated Annealing |
| 651 | -- | 663 | Baris Taskin, Ivan S. Kourtev. Delay Insertion Method in Clock Skew Scheduling |
| 664 | -- | 677 | Jaskirat Singh, Sachin S. Sapatnekar. Partition-Based Algorithm for Power Grid Design Using Locality |
| 678 | -- | 691 | Gi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng. A Fast Hierarchical Quadratic Placement Algorithm |
| 692 | -- | 709 | Brent Goplen, Sachin S. Sapatnekar. Placement of Thermal Vias in 3-D ICs Using Various Thermal Objectives |
| 710 | -- | 724 | James D. Ma, Rob A. Rutenbar. Fast Interval-Valued Statistical Modeling of Interconnect and Effective Capacitance |
| 725 | -- | 733 | Yukiko Kubo, Atsushi Takahashi. Global Routing by Iterative Improvements for Two-Layer Ball Grid Array Packages |
| 734 | -- | 738 | Di Wu, Jiang Hu, Rabi N. Mahapatra. Antenna Avoidance in Layer Assignment |