| 1789 | -- | 1802 | Cheng-Wu Lin, Jai-Ming Lin, Yen-Chih Chiu, Chun-Po Huang, Soon-Jyh Chang. Mismatch-Aware Common-Centroid Placement for Arbitrary-Ratio Capacitor Arrays Considering Dummy Capacitors |
| 1803 | -- | 1816 | Giovanni Ansaloni, Kazuyuki Tanimura, Laura Pozzi, Nikil Dutt. Integrated Kernel Partitioning and Scheduling for Coarse-Grained Reconfigurable Arrays |
| 1817 | -- | 1830 | Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, José M. Mendías, María C. Molina. Multispeculative Addition Applied to Datapath Synthesis |
| 1831 | -- | 1844 | Shupeng Sun, Yamei Feng, Changdao Dong, Xin Li. Efficient SRAM Failure Rate Prediction via Gibbs Sampling |
| 1845 | -- | 1856 | Zahra Lak, Nicola Nicolici. On Using On-Chip Clock Tuning Elements to Address Delay Degradation Due to Circuit Aging |
| 1857 | -- | 1866 | Hua-Yu Chang, Iris Hui-Ru Jiang, Yao-Wen Chang. Timing ECO Optimization Via Bézier Curve Smoothing and Fixability Identification |
| 1867 | -- | 1880 | Sudarshan Srinivasan, Kunal P. Ganeshpure, Sandip Kundu. A Wavelet-Based Spatio-Temporal Heat Dissipation Model for Reordering of Program Phases to Produce Temperature Extremes in a Chip |
| 1881 | -- | 1893 | Nicolas G. Constantin, Kai H. Kwok, Hongxiao Shao, Cristian Cismaru, Peter J. Zampardi. Formulations and a Computer-Aided Test Method for the Estimation of IMD Levels in an Envelope Feedback RFIC Power Amplifier |
| 1894 | -- | 1907 | Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer. EDT Bandwidth Management in SoC Designs |
| 1908 | -- | 1919 | Michael A. Kochte, Melanie Elm, Hans-Joachim Wunderlich. Accurate X-Propagation for Test Applications by SAT-Based Reasoning |
| 1920 | -- | 1924 | Janakiraman Viraraghavan, Shrinivas J. Pandharpure, Josef Watts. Statistical Compact Model Extraction: A Neural Network Approach |
| 1925 | -- | 1929 | Paolo Maffezzoni, Salvatore Levantino. Phase-Noise Analysis and Simulation of LC Oscillator-Based Injection-Locked Frequency Dividers |
| 1930 | -- | 1934 | Katherine Shu-Min Li, Yi-Yu Liao. Layout-Aware Multiple Scan Tree Synthesis for 3-D SoCs |
| 1935 | -- | 1939 | Jaeyong Chung, Jacob A. Abraham. On Computing Criticality in Refactored Timing Graphs |