| 111 | -- | 122 | Peter A. Ruetz, Po Tong, Douglas Bailey, Daniel Luthi, Peng H. Ang. A high-performance full-motion video compression chip set |
| 123 | -- | 134 | Hiroshi Fujiwara, Ming L. Liou, Ming-Ting Sun, Kun-Min Yang, Masanori Maruyama, Kazuyoshi Shomura, Koichi Ohyama. An all-ASIC implementation of a low bit-rate video codec |
| 135 | -- | 146 | Darren Slawecki, Weiping Li. DCT/IDCT processor design for high data rate image coding |
| 147 | -- | 158 | Rajeev Jain, Avanindra Madisetti, Richard L. Baker. An integrated circuit design for pruned tree-search vector quantization encoding with an off-chip controller |
| 159 | -- | 168 | Emmanuel D. Frimout, Johannes N. Driessen, Ed F. Deprettere. Parallel architecture for a pel-recursive motion estimation algorithm |
| 169 | -- | 175 | Chaur-Heh Hsieh, Ting-Pang Lin. VLSI architecture for block-matching motion estimation algorithm |
| 176 | -- | 186 | Shawmin Lei, Ming-Ting Sun, Kou-Hu Tzou. Design and hardware architecture of high-order conditional entropy coding for images |
| 187 | -- | 196 | Shih-Fu Chang, David G. Messerschmitt. Designing high-throughput VLC decoder. I. Concurrent VLSI architectures |
| 197 | -- | 206 | Horng-Dar Lin, David G. Messerschmitt. Designing a high-throughput VLC decoder. I. Parallel decoding methods |
| 207 | -- | 220 | Hironori Yamauchi, Yutaka Tashiro, Toshihiro Minami, Yutaka Suzuki. Architecture and implementation of a highly parallel single-chip video DSP |
| 221 | -- | 230 | Hartwig Jeschke, Klaus Gaedke, Peter Pirsch. Multiprocessor performance for real-time processing of video coding applications |
| 231 | -- | 244 | Alan Kwentus, Michael J. Werter, Alan N. Willson Jr.. A programmable digital filter IC employing multiple processors on a single chip |
| 245 | -- | 254 | Takashi Miyazaki, Takao Nishitani, Masaki Ishikawa, Masato Edahiro, Kaoru Mitsuhashi. Chrominance/luminance signal separation and syntheses chips developed with a DSP silicon compiler |
| 255 | -- | 267 | Keshab K. Parhi. Video data format converters using minimum number of registers |