| 535 | -- | 536 | Massoud Pedram. Introduction to special issue: Novel paradigms in system-level design |
| 537 | -- | 563 | Alessandro Pinto, Alvise Bonivento, Alberto L. Sangiovanni-Vincentelli, Roberto Passerone, Marco Sgroi. System level design paradigms: Platform-based design and communication synthesis |
| 564 | -- | 592 | Radu Marculescu, Ümit Y. Ogras, Nicholas H. Zamora. Computation and communication refinement for multiprocessor SoC design: A system-level perspective |
| 593 | -- | 625 | Paul Pop, Petru Eles, Zebo Peng, Traian Pop. Analysis and optimization of distributed real-time embedded systems |
| 626 | -- | 658 | Prabhat Mishra, Aviral Shrivastava, Nikil Dutt. Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs |
| 659 | -- | 681 | Roman L. Lysecky, Greg Stitt, Frank Vahid. Warp Processors |
| 682 | -- | 710 | Fei Su, Krishnendu Chakrabarty. Module placement for fault-tolerant microfluidics-based biochips |
| 711 | -- | 739 | Narender Hanchate, Nagarajan Ranganathan. A game-theoretic framework for multimetric optimization of interconnect delay, power, and crosstalk noise during wire sizing |
| 740 | -- | 772 | Gang Chen, Jason Cong. Simultaneous placement with clustering and duplication |
| 773 | -- | 796 | Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan. A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic bayesian networks |