Journal: TRETS

Volume 11, Issue 2

0 -- 0Marc-André Daigneault, Jean-Pierre David. Automated Synthesis of Streaming Transfer Level Hardware Designs
0 -- 0Oleg Petelin, Vaughn Betz. Wotan: Evaluating FPGA Architecture Routability without Benchmarks
0 -- 0Deshya Wijesundera, Alok Prakash, Thambipillai Srikanthan, Achintha Ihalage. Framework for Rapid Performance Estimation of Embedded Soft Core Processors
0 -- 0N. Nalla Anandakumar, M. Prem Laxman Das, Somitra Kumar Sanadhya, Mohammad S. Hashmi. Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve
0 -- 0Enrico Rossi, Marvin Damschen, Lars Bauer, Giorgio C. Buttazzo, Jörg Henkel. Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing With FPGAs