Journal: TRETS

Volume 12, Issue 4

0 -- 0Ibrahim Ahmed 0001, Shuze Zhao, James Meijers, Olivier Trescases, Vaughn Betz. FRoC 2.0: Automatic BRAM and Logic Testing to Enable Dynamic Voltage Scaling for FPGA Applications
0 -- 0Nina Engelhardt, Hayden Kwok-Hay So. GraVF-M: Graph Processing System Generation for Multi-FPGA Platforms
0 -- 0Marco Lattuada 0001, Fabrizio Ferrandi. A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows
0 -- 0Muhsen Owaida, Amit Kulkarni, Gustavo Alonso. Distributed Inference over Decision Tree Ensembles on Clusters of FPGAs
0 -- 0Jason Gorski, Darrin M. Hanna. The FPOA, a Medium-grained Reconfigurable Architecture for High-level Synthesis
0 -- 0Stephen Tridgell, Martin Kumm, Martin Hardieck, David Boland, Duncan J. M. Moss, Peter Zipf, Philip H. W. Leong. Unrolling Ternary Neural Networks