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| 0 | -- | 0 | Jason Yu, Christopher Eagleston, Christopher Han-Yu Chou, Maxime Perreault, Guy Lemieux. Vector Processing as a Soft Processor Accelerator |
| 0 | -- | 0 | G. Seetharaman, B. Venkataramani. Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits |
| 0 | -- | 0 | Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne. Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs |
| 0 | -- | 0 | Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat. TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA |
| 0 | -- | 0 | Hideharu Amano, Tadao Nakamura. Guest Editors Introduction: ICFPT 2007 |
| 0 | -- | 0 | Stephen Jang, Billy Chan, Kevin Chung, Alan Mishchenko. WireMap: FPGA Technology Mapping for Improved Routability and Enhanced LUT Merging |
| 0 | -- | 0 | Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi. ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs |
| 0 | -- | 0 | Dirk Koch, Christian Beckhoff, Jürgen Teich. Hardware Decompression Techniques for FPGA-Based Embedded Systems |