External Links

    Journal: TRETS

    Volume 2, Issue 4

    0 -- 0Katherine Compton, Roger Woods, Christos-Savvas Bouganis, Pedro C. Diniz. Introduction to the Special Issue ARC 08
    0 -- 0Keith D. Underwood, K. Scott Hemmert, Craig Ulmer. From Silicon to Science: The Long Road to Production Reconfigurable Supercomputing
    0 -- 0Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis. An Application Development Framework for ARISE Reconfigurable Processors
    0 -- 0Ozana Silvia Dragomir, Todor Stefanov, Koen Bertels. Optimal Loop Unrolling and Shifting for Reconfigurable Architectures
    0 -- 0Qiwei Jin, David B. Thomas, Wayne Luk, Benjamin Cope. Exploring Reconfigurable Architectures for Tree-Based Option Pricing Models
    0 -- 0Chia-Tien Dan Lo, Yi-Gang Tai. Space Optimization on Counters for FPGA-Based Perl Compatible Regular Expressions
    0 -- 0Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides. Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement

    Volume 2, Issue 3

    0 -- 0Jason Cong, Yi Zou. FPGA-Based Hardware Acceleration of Lithographic Aerial Image Simulation
    0 -- 0Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne. An FPGA Logic Cell and Carry Chain Configurable as a 6: 2 or 7: 2 Compressor
    0 -- 0Taneem Ahmed, Paul D. Kundarewich, Jason Helge Anderson. Packing Techniques for Virtex-5 FPGAs
    0 -- 0Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer. A-Port Networks: Preserving the Timed Behavior of Synchronous Systems for Modeling on FPGAs

    Volume 2, Issue 2

    0 -- 0Justin S. Wong, N. Pete Sedcole, Peter Y. K. Cheung. Self-Measurement of Combinatorial Circuit Delays in FPGAs
    0 -- 0Jason Yu, Christopher Eagleston, Christopher Han-Yu Chou, Maxime Perreault, Guy Lemieux. Vector Processing as a Soft Processor Accelerator
    0 -- 0G. Seetharaman, B. Venkataramani. Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits
    0 -- 0Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne. Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs
    0 -- 0Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat. TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA
    0 -- 0Hideharu Amano, Tadao Nakamura. Guest Editors Introduction: ICFPT 2007
    0 -- 0Stephen Jang, Billy Chan, Kevin Chung, Alan Mishchenko. WireMap: FPGA Technology Mapping for Improved Routability and Enhanced LUT Merging
    0 -- 0Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi. ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs
    0 -- 0Dirk Koch, Christian Beckhoff, Jürgen Teich. Hardware Decompression Techniques for FPGA-Based Embedded Systems

    Volume 2, Issue 1

    0 -- 0Shantanu Dutt, Li Li. Trust-Based Design and Check of FPGA Circuits Using Two-Level Randomized ECC Structures
    0 -- 0Laurent Sauvage, Sylvain Guilley, Yves Mathieu. Electromagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack on a Cryptographic Module
    0 -- 0Maurice Keller, Andrew Byrne, William P. Marnane. Elliptic Curve Cryptography on FPGA for Low-Power Applications
    0 -- 0Patrick Schaumont, Alex K. Jones, Steve Trimberger. Guest Editors Introduction to Security in Reconfigurable Systems Design
    0 -- 0Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak. Techniques for Design and Implementation of Secure Reconfigurable PUFs
    0 -- 0Robert P. McEvoy, Colin C. Murphy, William P. Marnane, Michael Tunstall. Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs
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