Journal: TRETS

Volume 14, Issue 4

0 -- 0José Romero Hung, Chao Li, Pengyu Wang, Chuanming Shao, Jinyang Guo, Jing Wang, Guoyong Shi. ACE-GCN: A Fast Data-driven FPGA Accelerator for GCN Embedding
0 -- 0Mark Wijtvliet, Henk Corporaal, Akash Kumar 0001. CGRA-EAM - Rapid Energy and Area Estimation for Coarse-grained Reconfigurable Architectures
0 -- 0Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, Zhiru Zhang. Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects
0 -- 0Sebastian Sabogal, Alan D. George, Gary Crum. Reconfigurable Framework for Resilient Semantic Segmentation for Space Applications
0 -- 0Zhenghua Gu, Wenqin Wan, Jundong Xie, Chang Wu. Dependency Graph-based High-level Synthesis for Maximum Instruction Parallelism
0 -- 0Tao Yang, Zhezhi He, Tengchuan Kou, Qingzheng Li, Qi Han, Haibao Yu, Fangxin Liu, Yun Liang 0001, Li Jiang 0002. BISWSRBS: A Winograd-based CNN Accelerator with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization

Volume 14, Issue 3

0 -- 0Abeer Y. Al-Hyari, Hannah Szentimrey, Ahmed Shamli, Timothy Martin, Gary Gréwal, Shawki Areibi. A Deep Learning Framework to Predict Routability for FPGA Circuit Placement
0 -- 0Endri Taka, Konstantinos Maragos, George Lentaris, Dimitrios Soudris. Process Variability Analysis in Interconnect, Logic, and Arithmetic Blocks of 16-nm FinFET FPGAs
0 -- 0Ryota Yasudo, José Gabriel de Figueiredo Coutinho, Ana Lucia Varbanescu, Wayne Luk, Hideharu Amano, Tobias Becker, Ce Guo. Analytical Performance Estimation for Large-Scale Reconfigurable Dataflow Platforms
0 -- 0Arif Sasongko, I. M. Narendra Kumara, Arief Wicaksana, Frédéric Rousseau, Olivier Muller. Hardware Context Switch-based Cryptographic Accelerator for Handling Multiple Streams
0 -- 0Enrico Reggiani, Emanuele Del Sozzo, Davide Conficconi, Giuseppe Natale, Carlo Moroni, Marco D. Santambrogio. Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components

Volume 14, Issue 2

0 -- 0Shenghsun Cho, Mrunal Patel, Michael Ferdman, Peter A. Milder. Practical Model Checking on FPGAs
0 -- 0Adriaan Peetermans, Vladimir Rozic, Ingrid Verbauwhede. Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling
0 -- 0Rui Ma, Jia-Ching Hsu, Tian Tan 0007, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu, Derek Chiou. Specializing FGPU for Persistent Deep Learning
0 -- 0Zhen Zhou, Debiao He, Zhe Liu 0001, Min Luo, Kim-Kwang Raymond Choo. A Software/Hardware Co-Design of Crystals-Dilithium Signature Scheme

Volume 14, Issue 1

0 -- 0Xuzhi Zhang, Xiaozhe Shao, George Provelengios, Naveen Kumar Dumpala, Lixin Gao 0001, Russell Tessier. CoNFV: A Heterogeneous Platform for Scalable Network Function Virtualization
0 -- 0Kaan Kara, Gustavo Alonso. PipeArch: Generic and Context-Switch Capable Data Processing on FPGAs
0 -- 0Alexander E. Beasley, Christopher T. Clarke, Robert J. Watson. An OpenGL Compliant Hardware Implementation of a Graphic Processing Unit Using Field Programmable Gate Array-System on Chip Technology
0 -- 0Soheil Mohajer, Zhiheng Wang 0002, Kia Bazargan, Yuyang Li. Parallel Unary Computing Based on Function Derivatives
0 -- 0Nikolaos Kyparissas, Apostolos Dollas. Large-scale Cellular Automata on FPGAs: A New Generic Architecture and a Framework