Journal: TRETS

Volume 15, Issue 4

0 -- 0Stefan Nikolic, Grace Zgheib, Paolo Ienne. Detailed Placement for Dedicated LUT-Level FPGA Interconnect
0 -- 0Gagandeep Singh 0002, Dionysios Diamantopoulos, Juan Gómez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu. Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric
0 -- 0Xinyu Chen, Feng Cheng, Hongshi Tan, Yao Chen, Bingsheng He, Weng-Fai Wong, Deming Chen. ThunderGP: Resource-Efficient Graph Processing Framework on FPGAs with HLS
0 -- 0Kahlan Gibson, Esther Roorda, Daniel Holanda Noronha, Steven J. E. Wilton. Adaptive Clock Management of HLS-generated Circuits on FPGAs
0 -- 0Jason Cong, Jason Lau, Gai Liu, Stephen Neuendorffer, Peichen Pan, Kees A. Vissers, Zhiru Zhang. FPGA HLS Today: Successes, Challenges, and Opportunities
0 -- 0Philip H. W. Leong. Introduction to Special Section on FPGA 2021
0 -- 0Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso. Exploiting HBM on FPGAs for Data Processing
0 -- 0Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre. HopliteML: Evolving Application Customized FPGA NoCs with Adaptable Routers and Regulators
0 -- 0Krystine Dawn Sherwin, Kevin I-Kai Wang, Prabu Thiagaraj, Ben Stappers, Oliver Sinnen. Median Filters on FPGAs for Infinite Data and Large, Rectangular Windows
0 -- 0Kemal Ebcioglu, Ismail San. Highly Parallel Multi-FPGA System Compilation from Sequential C/C++ Code in the AWS Cloud
0 -- 0Niansong Zhang, Xiang Chen, Nachiket Kapre. RapidLayout: Fast Hard Block Placement of FPGA-optimized Systolic Arrays Using Evolutionary Algorithm
0 -- 0Alec Lu, Zhenman Fang, Lesley Shannon. Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking
0 -- 0Nele Mentens, Lionel Sousa, Pedro Trancoso. Introduction to the Special Section on FPL 2020
0 -- 0Sathish Panchapakesan, Zhenman Fang, Jian Li. SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs
0 -- 0Aman Arora, Moinak Ghosh, Samidh Mehta, Vaughn Betz, Lizy K. John. Tensor Slices: FPGA Building Blocks For The Deep Learning Era
0 -- 0Martin Langhammer, Eriko Nurvitadhi, Sergey Gribok, Bogdan Pasca 0001. Stratix 10 NX Architecture
0 -- 0Hayden Cook, Jacob Arscott, Brent George, Tanner Gaskin, Jeffrey Goeders, Brad L. Hutchings. Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits

Volume 15, Issue 3

0 -- 0Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon. Quick-Div: Rethinking Integer Divider Design for FPGA-based Soft-processors
0 -- 0Nikolaos Alachiotis 0001, Panagiotis Skrimponis, Manolis Pissadakis, Dionisios N. Pnevmatikatos. Scalable Phylogeny Reconstruction with Disaggregated Near-memory Processing
0 -- 0S. Rasoul Faraji, Pierre Abillama, Kia Bazargan. Approximate Constant-Coefficient Multiplication Using Hybrid Binary-Unary Computing for FPGAs
0 -- 0Christian Lienen, Marco Platzner. Design of Distributed Reconfigurable Robotics Systems with ReconROS
0 -- 0Christophe Bobda, Joel Mandebi Mbongue, Paul Chow, Mohammad Ewais, Naif Tarafdar, Juan Camilo Vega, Ken Eguro, Dirk Koch, Suranga Handagala, Miriam Leeser, Martin C. Herbordt, Hafsah Shahzad, Peter Hofste, Burkhard Ringlein, Jakub Szefer, Ahmed Sanaullah, Russell Tessier. The Future of FPGA Acceleration in Datacenters and the Cloud
0 -- 0Florian Dewald, Johanna Rohde, Christian Hochberger, Heiko Mantel. Improving Loop Parallelization by a Combination of Static and Dynamic Analyses in HLS
0 -- 0Shulin Zeng, Guohao Dai, Hanbo Sun, Jun Liu, Shiyao Li, Guangjun Ge, Kai Zhong, Kaiyuan Guo, Yu Wang 0002, Huazhong Yang. A Unified FPGA Virtualization Framework for General-Purpose Deep Neural Networks in the Cloud
0 -- 0Naif Tarafdar, Giuseppe Di Guglielmo, Philip C. Harris, Jeffrey D. Krupa, Vladimir Loncar, Dylan S. Rankin, Nhan Tran, Zhenbin Wu, Qianfeng Shen, Paul Chow. AIgean: An Open Framework for Deploying Machine Learning on Heterogeneous Clusters
0 -- 0Eli Cahill, Brad L. Hutchings, Jeffrey Goeders. Approaches for FPGA Design Assurance
0 -- 0Gaoming Du, Bangyi Chen, Zhenmin Li, Zhenxing Tu, Junjie Zhou, Shenya Wang, Qinghao Zhao, Yongsheng Yin, Xiaolei Wang. A BNN Accelerator Based on Edge-skip-calculation Strategy and Consolidation Compressed Tree
0 -- 0Esther Roorda, SeyedRamin Rasoulinezhad, Philip H. W. Leong, Steven J. E. Wilton. FPGA Architecture Exploration for DNN Acceleration
0 -- 0Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong. Introduction to Special Issue on FPGAs in Data Centers, Part II
0 -- 0Stefan Brennsteiner, Tughrul Arslan, John Thompson 0001, Andrew C. McCormick. A Real-Time Deep Learning OFDM Receiver

Volume 15, Issue 2

0 -- 0Joel Mandebi Mbongue, Danielle Tchuinkou Kwadjo, Alex Shuping, Christophe Bobda. Deploying Multi-tenant FPGAs within Linux-based Cloud Infrastructure
0 -- 0Tobias Alonso, Lucian Petrica, Mario Ruiz, Jakoba Petri-Koenig, Yaman Umuroglu, Ioannis Stamelos, Elias Koromilas, Michaela Blott, Kees A. Vissers. Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning
0 -- 0Paolo D'Alberto, Victor Wu, Aaron Ng, Rahul Nimaiyar, Elliott Delaye, Ashish Sirasao. xDNN: Inference for Deep Convolutional Neural Networks
0 -- 0Andrea Damiani, Giorgia Fiscaletti, Marco Bacis, Rolando Brondolin, Marco D. Santambrogio. BlastFunction: A Full-stack Framework Bringing FPGA Hardware Acceleration to Cloud-native Applications
0 -- 0Sahand Salamat, Hui Zhang, Yang-Seok Ki, Tajana Rosing. NASCENT2: Generic Near-Storage Sort Accelerator for Data Analytics on SmartSSD
0 -- 0Andrew M. Keller, Michael J. Wirthlin. The Impact of Terrestrial Radiation on FPGAs in Data Centers
0 -- 0Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong. Introduction to Special Issue on FPGAs in Data Centers
0 -- 0Atakan Dogan, Kemal Ebcioglu. Cloud Building Block Chip for Creating FPGA and ASIC Clouds
0 -- 0Tom Hogervorst, Razvan Nane, Giacomo Marchiori, Tong Dong Qiu, Markus Blatt, Alf Birger Rustad. Hardware Acceleration of High-Performance Computational Flow Dynamics Using High-Bandwidth Memory-Enabled Field-Programmable Gate Arrays
0 -- 0Mikhail Asiatici, Paolo Ienne. Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs
0 -- 0Gongjin Sun, Seongyoung Kang, Sang-Woo Jun. BurstZ+: Eliminating The Communication Bottleneck of Scientific Computing Accelerators via Accelerated Compression

Volume 15, Issue 1

0 -- 0Franz-Josef Streit, Paul Krüger, Andreas Becher, Stefan Wildermann, Jürgen Teich. Design and Evaluation of a Tunable PUF Architecture for FPGAs
0 -- 0Lesley Shannon. Introduction to Special Section on FPGA 2020
0 -- 0Philippos Papaphilippou, Jiuxi Meng, Nadeen Gebara, Wayne Luk. Hipernetch: High-Performance FPGA Network Switch
0 -- 0Deming Chen. Note from the TRETS EiC about the new Journal-first track in FPT'21
0 -- 0Chen Wu, Mingyu Wang, Xinyuan Chu, Kun Wang 0005, Lei He 0001. Low-precision Floating-point Arithmetic for High-performance FPGA-based CNN Acceleration
0 -- 0Yun Zhou, Pongstorn Maidee, Chris Lavin 0001, Alireza Kaviani, Dirk Stroobandt. RWRoute: An Open-source Timing-driven Router for Commercial FPGAs
0 -- 0SeyedRamin Rasoulinezhad, Esther Roorda, Steve Wilton, Philip H. W. Leong, David Boland. Rethinking Embedded Blocks for Machine Learning Applications
0 -- 0Johannes Menzel, Christian Plessl, Tobias Kenter. The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations
0 -- 0Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella. Buffer Placement and Sizing for High-Performance Dataflow Circuits
0 -- 0Mathieu Gross, Konrad Hohentanner, Stefan Wiehler, Georg Sigl. Enhancing the Security of FPGA-SoCs via the Usage of ARM TrustZone and a Hybrid-TPM
0 -- 0Vladimir Rybalkin, Jonas Ney, Menbere Kina Tekleyohannes, Norbert Wehn. When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network