0 | -- | 0 | Stefan Nikolic, Grace Zgheib, Paolo Ienne. Detailed Placement for Dedicated LUT-Level FPGA Interconnect |
0 | -- | 0 | Gagandeep Singh 0002, Dionysios Diamantopoulos, Juan Gómez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu. Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric |
0 | -- | 0 | Xinyu Chen, Feng Cheng, Hongshi Tan, Yao Chen, Bingsheng He, Weng-Fai Wong, Deming Chen. ThunderGP: Resource-Efficient Graph Processing Framework on FPGAs with HLS |
0 | -- | 0 | Kahlan Gibson, Esther Roorda, Daniel Holanda Noronha, Steven J. E. Wilton. Adaptive Clock Management of HLS-generated Circuits on FPGAs |
0 | -- | 0 | Jason Cong, Jason Lau, Gai Liu, Stephen Neuendorffer, Peichen Pan, Kees A. Vissers, Zhiru Zhang. FPGA HLS Today: Successes, Challenges, and Opportunities |
0 | -- | 0 | Philip H. W. Leong. Introduction to Special Section on FPGA 2021 |
0 | -- | 0 | Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso. Exploiting HBM on FPGAs for Data Processing |
0 | -- | 0 | Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre. HopliteML: Evolving Application Customized FPGA NoCs with Adaptable Routers and Regulators |
0 | -- | 0 | Krystine Dawn Sherwin, Kevin I-Kai Wang, Prabu Thiagaraj, Ben Stappers, Oliver Sinnen. Median Filters on FPGAs for Infinite Data and Large, Rectangular Windows |
0 | -- | 0 | Kemal Ebcioglu, Ismail San. Highly Parallel Multi-FPGA System Compilation from Sequential C/C++ Code in the AWS Cloud |
0 | -- | 0 | Niansong Zhang, Xiang Chen, Nachiket Kapre. RapidLayout: Fast Hard Block Placement of FPGA-optimized Systolic Arrays Using Evolutionary Algorithm |
0 | -- | 0 | Alec Lu, Zhenman Fang, Lesley Shannon. Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking |
0 | -- | 0 | Nele Mentens, Lionel Sousa, Pedro Trancoso. Introduction to the Special Section on FPL 2020 |
0 | -- | 0 | Sathish Panchapakesan, Zhenman Fang, Jian Li. SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs |
0 | -- | 0 | Aman Arora, Moinak Ghosh, Samidh Mehta, Vaughn Betz, Lizy K. John. Tensor Slices: FPGA Building Blocks For The Deep Learning Era |
0 | -- | 0 | Martin Langhammer, Eriko Nurvitadhi, Sergey Gribok, Bogdan Pasca 0001. Stratix 10 NX Architecture |
0 | -- | 0 | Hayden Cook, Jacob Arscott, Brent George, Tanner Gaskin, Jeffrey Goeders, Brad L. Hutchings. Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits |