| 113 | -- | 114 | Toomas P. Plaks. Guest Editorial Special Section on Configurable Computing Design-II: Hardware Level Reconfiguration |
| 115 | -- | 123 | Paul Beckett. A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors |
| 124 | -- | 133 | Yan Lin, Lei He, Mike Hutton. Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs |
| 134 | -- | 143 | Peter Zipf. Applying Dynamic Reconfiguration for Fault Tolerance in Fine-Grained Logic Arrays |
| 144 | -- | 155 | Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin. Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective |
| 156 | -- | 166 | Ioannis Sourdis, Dionisios N. Pnevmatikatos, Stamatis Vassiliadis. Scalable Multigigabit Pattern Matching for Packet Inspection |
| 167 | -- | 176 | Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna. Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores |
| 177 | -- | 187 | Michael J. Beauchamp, Scott Hauck, Keith D. Underwood, K. Scott Hemmert. Architectural Modifications to Enhance the Floating-Point Performance of FPGAs |
| 188 | -- | 197 | Xinming Huang, Cao Liang, Jing Ma. System Architecture and Implementation of MIMO Sphere Decoders on FPGA |
| 198 | -- | 205 | W. N. Chelton, Mohammed Benaissa. Fast Elliptic Curve Cryptography on FPGA |
| 206 | -- | 209 | Jie Gu, John Keane, Sachin S. Sapatnekar, Chris H. Kim. Statistical Leakage Estimation of Double Gate FinFET Devices Considering the Width Quantization Property |
| 210 | -- | 212 | Saralees Nadarajah, Samuel Kotz. Exact Distribution of the Max/Min of Two Gaussian Random Variables |