| 1685 | -- | 1692 | Na Niu, Fangfa Fu, Bing Yang, Qiang Wang, Xinpeng Li, Fengchang Lai, Jinxiang Wang. PFHA: A Novel Page Migration Algorithm for Hybrid Memory Embedded Systems |
| 1693 | -- | 1706 | Hritom Das, Ali Ahmad Haidous, Scott C. Smith, Na Gong. Flexible Low-Cost Power-Efficient Video Memory With ECC-Adaptation |
| 1707 | -- | 1719 | M. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim. A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI |
| 1720 | -- | 1729 | Chih-Wei Tsai, Yu-Ting Chiu, Yo-Hao Tu, Kuo-Hsing Cheng. A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications |
| 1730 | -- | 1742 | Kaniz Mishty, Mehdi Sadi. Designing Efficient and High-Performance AI Accelerators With Customized STT-MRAM |
| 1743 | -- | 1756 | Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty. Performance and Accuracy Tradeoffs for Training Graph Neural Networks on ReRAM-Based Architectures |
| 1757 | -- | 1770 | Morteza Hosseini, Nitheesh Kumar Manjunath, Bharat Prakash, Arnab Neelim Mazumder, Vandana Chandrareddy, Houman Homayoun, Tinoosh Mohsenin. Cyclic Sparsely Connected Architectures for Compact Deep Convolutional Neural Networks |
| 1771 | -- | 1781 | Tianqi Kong, Shuguo Li. Design and Analysis of Approximate 4-2 Compressors for High-Accuracy Multipliers |
| 1782 | -- | 1789 | Bin Zhou, Guangsen Wang, Guisheng Jie, Qing Liu, Zhiwei Wang. A High-Speed Floating-Point Multiply-Accumulator Based on FPGAs |
| 1790 | -- | 1799 | Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy, Koushik Chakraborty. EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units |
| 1800 | -- | 1811 | Hayate Okuhara, Ahmed Elnaqib, Martino Dazzi, Pierpaolo Palestri, Simone Benatti, Luca Benini, Davide Rossi. A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS |