Journal: IEEE Trans. VLSI Syst.

Volume 30, Issue 1

1 -- 4Massimo Alioto. Editorial Opening of the 2022 TVLSI Editorial Year - Connecting Trends From Society to VLSI Systems
5 -- 14Makoto Nagata, Takuji Miki, Noriyuki Miura. Physical Attack Protection Techniques for IC Chip Level Hardware Security
15 -- 28Tuotian Liao, Lihong Zhang. High-Dimensional Many-Objective Bayesian Optimization for LDE-Aware Analog IC Sizing
29 -- 39Yue-Ming Wu, Yu-Hsien Kao, Ta-Shun Chu. A 68-GHz Loss Compensated Distributed Amplifier Using Frequency Interleaved Technique in 65-nm CMOS Technology
40 -- 50Ragh Kuttappa, Longfei Wang, Selçuk Köse, Baris Taskin. Multiphase Digital Low-Dropout Regulators
51 -- 59Ghassem Jaberipur, Farzad Ghazanfari. Impact of Radix-10 Redundant Digit Set [-6, 9] on Basic Decimal Arithmetic Operations
60 -- 67Nicholas A. Lanzillo, Albert Chu, Prasad Bhosale, Dan J. Dechene. Power Delivery Design, Signal Routing, and Performance of On-Chip Cobalt Interconnects in Advanced Technology Nodes
68 -- 80Priyesh Shukla, Ankith Muralidhar, Nick Iliev, Theja Tulabandhula, Sawyer B. Fuller, Amit Ranjan Trivedi. Ultralow-Power Localization of Insect-Scale Drones: Interplay of Probabilistic Filtering and Compute-in-Memory
81 -- 94Ning-Chi Huang, Chao-Wei Cheng, Kai-Chiang Wu. Timing Variability-Aware Analysis and Optimization for Variable-Latency Designs
95 -- 107Weidong Zhang, Zhenxing Dong, Yan Zhu. EddySuperblock: Improving NAND Flash Efficiency and Lifetime by Endurance-Driven Dynamic Superblock Management
108 -- 111Sumit Walia, Bachu Varun Tej, Arpita Kabra, Joydeep Kumar Devnath, Joycee Mekie. Fast and Low-Power Quantized Fixed Posit High-Accuracy DNN Implementation
112 -- 0Moslem Heidarpur, Mitra Mirhassani. Corrections to "An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FPGA Implementation"