| 75 | -- | 84 | L. M. Patnaik, Satrajit Gupta. Exact Output Response Computation of RC Interconnects Under General Polynomial Input Waveforms |
| 85 | -- | 105 | Bogdan J. Falkowski, Radomir S. Stankovic. Spectral Interpretation and Applications of Decision Diagrams |
| 107 | -- | 113 | Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen. A Practical Load-optimized VCO Design for Low-jitter 5V 500 MHz Digital Phase-locked Loop |
| 115 | -- | 128 | Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici. A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold Logic |
| 129 | -- | 136 | Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda. νMOS-based Sorter for Arithmetic Applications |
| 137 | -- | 147 | Yanjun Zhang, Si-Qing Zheng. An Efficient Parallel VLSI Sorting Architecture |
| 149 | -- | 159 | Chien-In Henry Chen, Yingjie Zhou. Configurable 2-D Linear Feedback Shift Registers for VLSI Built-in Self-test Designs |
| 161 | -- | 173 | Dong Wook Kim, Tae-Yong Choi. Delay Time Estimation Model for Large Digital CMOS Circuits |