A. K. B. A ain, A. H. Bratt, A. P. Dorey. Exposing floating gate defects in analogue CMOS circuits by power supply voltage control testing technique. In 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India. pages 239-242, IEEE Computer Society, 1995. [doi]
Abstract is missing.