Error-resilient low-power Viterbi decoder architectures

Rami A. Abdallah, Naresh R. Shanbhag. Error-resilient low-power Viterbi decoder architectures. IEEE Transactions on Signal Processing, 57(12):4906-4917, 2009. [doi]

Authors

Rami A. Abdallah

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Naresh R. Shanbhag

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