Rami A. Abdallah, Naresh R. Shanbhag. Error-resilient low-power Viterbi decoder architectures. IEEE Transactions on Signal Processing, 57(12):4906-4917, 2009. [doi]
@article{AbdallahS09,
title = {Error-resilient low-power Viterbi decoder architectures},
author = {Rami A. Abdallah and Naresh R. Shanbhag},
year = {2009},
doi = {10.1109/TSP.2009.2026078},
url = {http://dx.doi.org/10.1109/TSP.2009.2026078},
tags = {architecture},
researchr = {https://researchr.org/publication/AbdallahS09},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Signal Processing},
volume = {57},
number = {12},
pages = {4906-4917},
}