Saleh Abdel-Hafeez, Mohammad Shatnawi, Ann Gordon-Ross. A double data rate 8T-cell SRAM architecture for systems-on-chip. In 2012 International Symposium on System on Chip, ISSoC 2012, Tampere, Finland, October 10-12, 2012. pages 1-4, IEEE, 2012. [doi]
Abstract is missing.