A Logic Simulation Machine

Miron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon. A Logic Simulation Machine. IEEE Trans. on CAD of Integrated Circuits and Systems, 2(2):82-94, 1983. [doi]

@article{AbramoviciLM83,
  title = {A Logic Simulation Machine},
  author = {Miron Abramovici and Ytzhak H. Levendel and Premachandran R. Menon},
  year = {1983},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=28424&arnumber=1270024&count=9&index=3},
  tags = {logic},
  researchr = {https://researchr.org/publication/AbramoviciLM83},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {2},
  number = {2},
  pages = {82-94},
}