Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets

Marleen Adé, Rudy Lauwereins, J. A. Peperstraete. Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets. In DAC. pages 64-69, 1997. [doi]

Abstract

Abstract is missing.