Ankur Agiwal, Montek Singh. An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems. In 2005 International Conference on Computer-Aided Design (ICCAD 05), November 6-10, 2005, San Jose, CA, USA. pages 1006-1013, IEEE Computer Society, 2005.
@inproceedings{AgiwalS05,
title = {An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems},
author = {Ankur Agiwal and Montek Singh},
year = {2005},
tags = {architecture, systematic-approach},
researchr = {https://researchr.org/publication/AgiwalS05},
cites = {0},
citedby = {0},
pages = {1006-1013},
booktitle = {2005 International Conference on Computer-Aided Design (ICCAD 05), November 6-10, 2005, San Jose, CA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7803-9254-X},
}