Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani. A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links. J. Solid-State Circuits, 45(8):1533-1541, 2010. [doi]
@article{AhmadiAH10,
title = {A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links},
author = {Mahmoud Reza Ahmadi and Amir Amirkhany and Ramesh Harjani},
year = {2010},
doi = {10.1109/JSSC.2010.2047439},
url = {http://dx.doi.org/10.1109/JSSC.2010.2047439},
researchr = {https://researchr.org/publication/AhmadiAH10},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {45},
number = {8},
pages = {1533-1541},
}