A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links

Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani. A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links. J. Solid-State Circuits, 45(8):1533-1541, 2010. [doi]

Abstract

Abstract is missing.