Low power pattern generation for BIST architecture

Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani. Low power pattern generation for BIST architecture. In ISCAS (4). pages 689-692, 2004.

@inproceedings{AhmedTN04,
  title = {Low power pattern generation for BIST architecture},
  author = {Nisar Ahmed and Mohammad H. Tehranipour and Mehrdad Nourani},
  year = {2004},
  tags = {architecture},
  researchr = {https://researchr.org/publication/AhmedTN04},
  cites = {0},
  citedby = {0},
  pages = {689-692},
  booktitle = {ISCAS (4)},
}