Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays

Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Akira Kotabe, Kiyoo Itoh. Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays. In IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009. pages 142-143, IEEE, 2009. [doi]

@inproceedings{AkiyamaSTKI09,
  title = {Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays},
  author = {Satoru Akiyama and Tomonori Sekiguchi and Riichiro Takemura and Akira Kotabe and Kiyoo Itoh},
  year = {2009},
  doi = {10.1109/ISSCC.2009.4977348},
  url = {http://dx.doi.org/10.1109/ISSCC.2009.4977348},
  researchr = {https://researchr.org/publication/AkiyamaSTKI09},
  cites = {0},
  citedby = {0},
  pages = {142-143},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-3458-9},
}