Three Dimensional FPGA Architecture with Fewer TSVs

Motoki Amagasaki, Masato Ikebe, Qian Zhao 0001, Masahiro Iida, Toshinori Sueyoshi. Three Dimensional FPGA Architecture with Fewer TSVs. IEICE Transactions, 101-D(2):278-287, 2018. [doi]

Abstract

Abstract is missing.