Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Sadia Malik, Newton Petersen, Kaushik Ravindran, Trung N. Tran, Guoqiang Wang, Guang Yang. Early timing estimation for system-level design using FPGAs (abstract only). In Katherine Compton, Brad L. Hutchings, editors, Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012. pages 271, ACM, 2012. [doi]
@inproceedings{AndradeGLMPRTWY12,
title = {Early timing estimation for system-level design using FPGAs (abstract only)},
author = {Hugo A. Andrade and Arkadeb Ghosal and Rhishikesh Limaye and Sadia Malik and Newton Petersen and Kaushik Ravindran and Trung N. Tran and Guoqiang Wang and Guang Yang},
year = {2012},
doi = {10.1145/2145694.2145761},
url = {http://doi.acm.org/10.1145/2145694.2145761},
researchr = {https://researchr.org/publication/AndradeGLMPRTWY12},
cites = {0},
citedby = {0},
pages = {271},
booktitle = {Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012},
editor = {Katherine Compton and Brad L. Hutchings},
publisher = {ACM},
isbn = {978-1-4503-1155-7},
}