Early timing estimation for system-level design using FPGAs (abstract only)

Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Sadia Malik, Newton Petersen, Kaushik Ravindran, Trung N. Tran, Guoqiang Wang, Guang Yang. Early timing estimation for system-level design using FPGAs (abstract only). In Katherine Compton, Brad L. Hutchings, editors, Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012. pages 271, ACM, 2012. [doi]

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