Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems

Caaliph Andriamisaina, Bertrand Le Gal, Emmanuel Casseau. Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2006, Proceedings, October 2-4, 2006, Banff, Alberta, Canada. pages 280-285, IEEE, 2006. [doi]

Authors

Caaliph Andriamisaina

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Bertrand Le Gal

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Emmanuel Casseau

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