Verification of RTL generated from scheduled behavior in a high-level synthesis flow

Pranav Ashar, Subhrajit Bhattacharya, Anand Raghunathan, Akira Mukaiyama. Verification of RTL generated from scheduled behavior in a high-level synthesis flow. In ICCAD. pages 517-524, 1998. [doi]

@inproceedings{AsharBRM98,
  title = {Verification of RTL generated from scheduled behavior in a high-level synthesis flow},
  author = {Pranav Ashar and Subhrajit Bhattacharya and Anand Raghunathan and Akira Mukaiyama},
  year = {1998},
  doi = {10.1145/288548.289080},
  url = {http://doi.acm.org/10.1145/288548.289080},
  tags = {data-flow},
  researchr = {https://researchr.org/publication/AsharBRM98},
  cites = {0},
  citedby = {0},
  pages = {517-524},
  booktitle = {ICCAD},
}