Maryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De. A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS. In 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA. pages 567-573, IEEE Computer Society, 2005. [doi]
Abstract is missing.