120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board - researchr publication authors

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Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre. 120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board. In Jonathan W. Greene, Jason Helge Anderson, editors, Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2017, Monterey, CA, USA, February 22-24, 2017. pages 141-146, ACM, 2017. [doi]

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