Jonathan W. Greene - researchr alias

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Viewing Publication 1 - 14 from 14

2023

2018

Improving FPGA Performance with a S44 LUT StructureWenyi Feng, Jonathan W. Greene, Alan Mishchenko. fpga 2018: 61-66 [doi]

2015

Technology Mapping into General Programmable CellsAlan Mishchenko, Robert K. Brayton, Wenyi Feng, Jonathan W. Greene. fpga 2015: 70-73 [doi]

2014

Rent's rule based FPGA packing for routability optimizationWenyi Feng, Jonathan W. Greene, Kristofer Vorwerk, Val Pevzner, Arun Kundu. fpga 2014: 31-34 [doi]

2011

A 65nm flash-based FPGA fabric optimized for low cost and powerJonathan W. Greene, Sinan Kaptanoglu, Wenyi Feng, Volker Hecht, Joel Landry, Fei Li, Anton Krouglyanskiy, Mihai Morosan, Val Pevzner. fpga 2011: 87-96 [doi]

2009

Improving Simulated Annealing-Based FPGA Placement With Directed MovesKristofer Vorwerk, Andrew A. Kennings, Jonathan W. Greene. tcad, 28(2):179-192, 2009. [doi]

2007

Post-Placement Interconnect EntropyWenyi Feng, Jonathan W. Greene. tvlsi, 15(8):945-948, 2007. [doi]

2006

Post-placement interconnect entropy: how many configuration bits does a programmable logic device need?Wenyi Feng, Jonathan W. Greene. slip 2006: 41-48 [doi]

1993

Segmented channel routingVwani P. Roychowdhury, Jonathan W. Greene, Abbas El Gamal. tcad, 12(1):79-95, 1993. [doi]

1990

Segmented Channel RoutingJonathan W. Greene, Vwani P. Roychowdhury, Sinan Kaptanoglu, Abbas El Gamal. dac 1990: 567-572 [doi]

1989

An architecture for electrically configurable gate arraysAbbas El Gamal, Jonathan W. Greene, Justin Reyneri, Eric Rogoyski, Khaled A. El-Ayat, Amr Mohsen. jssc, 24(2):394-398, April 1989. [doi]

1984

Configuration of VLSI Arrays in the Presence of DefectsJonathan W. Greene, Abbas El Gamal. JACM, 31(4):694-717, 1984. [doi]

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