Val Pevzner - researchr alias

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Viewing Publication 1 - 7 from 7

2014

Rent's rule based FPGA packing for routability optimizationWenyi Feng, Jonathan W. Greene, Kristofer Vorwerk, Val Pevzner, Arun Kundu. fpga 2014: 31-34 [doi]

2011

2010

Efficient FPGA Resynthesis Using Precomputed LUT StructuresAndrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu. fpl 2010: 532-537 [doi]

Power minimisation during field programmable gate array placementKristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu. iet-cdt, 4(3):170-183, 2010. [doi]

2009

FPGA technology mapping with encoded libraries andstaged priority cutsAndrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox. fpga 2009: 143-150 [doi]

Physical optimization for FPGAs using post-placement topology rewritingVal Pevzner, Andrew A. Kennings, Andy Fox. ispd 2009: 91-98 [doi]

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