Arun Kundu - researchr alias

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Viewing Publication 1 - 8 from 8

2019

Multi-Commodity Flow-Based Spreading in a Commercial Analytic PlacerNima Karimpour Darav, Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu. fpga 2019: 122-131 [doi]

2014

Rent's rule based FPGA packing for routability optimizationWenyi Feng, Jonathan W. Greene, Kristofer Vorwerk, Val Pevzner, Arun Kundu. fpga 2014: 31-34 [doi]

2011

FPGA technology mapping with encoded libraries and staged priority cutsAndrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox. trets, 4(4):35, 2011. [doi]

2010

Efficient FPGA Resynthesis Using Precomputed LUT StructuresAndrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu. fpl 2010: 532-537 [doi]

Power minimisation during field programmable gate array placementKristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu. iet-cdt, 4(3):170-183, 2010. [doi]

2009

FPGA technology mapping with encoded libraries andstaged priority cutsAndrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox. fpga 2009: 143-150 [doi]

2008

A technique for minimizing power during FPGA placementKristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-chung Hsu, Arun Kundu, Andrew A. Kennings. fpl 2008: 233-238 [doi]

1999

A New High Density and Very Low Cost Reprogrammable FPGA ArchitectureSinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting. fpga 1999: 3-12 [doi]

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