Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre. 120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board. In Jonathan W. Greene, Jason Helge Anderson, editors, Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2017, Monterey, CA, USA, February 22-24, 2017. pages 141-146, ACM, 2017. [doi]
@inproceedings{BRMK17,
title = {120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board},
author = {Chethan Kumar H. B and Prashant Ravi and Gourav Modi and Nachiket Kapre},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3021751},
researchr = {https://researchr.org/publication/BRMK17},
cites = {0},
citedby = {0},
pages = {141-146},
booktitle = {Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2017, Monterey, CA, USA, February 22-24, 2017},
editor = {Jonathan W. Greene and Jason Helge Anderson},
publisher = {ACM},
isbn = {978-1-4503-4354-1},
}