Reducing expected delay and power in FPGAs using buffer insertion in single-driver wires

Anahita Bagheri, Nasser Masoumi. Reducing expected delay and power in FPGAs using buffer insertion in single-driver wires. Microelectronics Journal, 43(12):1038-1045, 2012. [doi]

Authors

Anahita Bagheri

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Nasser Masoumi

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