Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths - researchr publication related

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R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi. Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths. IEEE Trans. on CAD of Integrated Circuits and Systems, 16(10):1101-1115, 1997. [doi]

The following publications are possibly variants of this publication:

A symbolic method to reduce power consumption of circuits containing false pathsR. Iris Bahar, Gary D. Hachtel, Enrico Macii, Fabio Somenzi. iccad 1994: 368-371 [doi]

Timing Analysis of Combinational Circuits using ADD sR. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi. eurodac 1994: 625-629

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