Aydin O. Balkan, Michael N. Horak, Gang Qu, Uzi Vishkin. Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing. In John W. Lockwood, Fabrizio Petrini, Ron Brightwell, Dhabaleswar K. Panda, editors, 15th Annual IEEE Symposium on High-Performance Interconnects, HOTI 2007, Stanford, CA, USA, August 22-24, 2007. pages 21-28, IEEE Computer Society, 2007. [doi]
@inproceedings{BalkanHQV07,
title = {Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing},
author = {Aydin O. Balkan and Michael N. Horak and Gang Qu and Uzi Vishkin},
year = {2007},
doi = {10.1109/HOTI.2007.11},
url = {http://doi.ieeecomputersociety.org/10.1109/HOTI.2007.11},
researchr = {https://researchr.org/publication/BalkanHQV07},
cites = {0},
citedby = {0},
pages = {21-28},
booktitle = {15th Annual IEEE Symposium on High-Performance Interconnects, HOTI 2007, Stanford, CA, USA, August 22-24, 2007},
editor = {John W. Lockwood and Fabrizio Petrini and Ron Brightwell and Dhabaleswar K. Panda},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-2979-0},
}