John E. Barth Jr., Darren Anand, Steve Burns 0001, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Michael R. Nelms, Erik Nelson, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Stephen Sliva. A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining. J. Solid-State Circuits, 40(1):213-222, 2005. [doi]
Abstract is missing.