Darren Anand - researchr alias

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Viewing Publication 1 - 13 from 13

2019

Behavioral Modeling of a Charge Trap Transistor One Time Programmable MemoryEric Hunt-Schroeder, Darren Anand, Edward Hwang, Aaron Cummings, Matthew Deming, Michael Roberge, Michael Ziegerhofer. natw 2019: 1-6 [doi]

2018

14NM FinFET 1.5MB Embedded High-K Charge Trap Transistor One Time Programmable Memory Using Dynamic Adaptive ProgrammingEric Hunt-Schroeder, Darren Anand, John Fifield, Mark Jacunski, Michael Roberge, Dale Pontius, Kevin Batson, Toshiaki Kirihata. vlsic 2018: 87-88 [doi]

2011

Embedded DRAM in 45-nm Technology and BeyondDarren Anand, Kevin Gorman, Mark Jacunski, Adrian Paparelli. dt, 28(1):14-21, 2011. [doi]

2010

A 45nm SOI compiled embedded DRAM with random cycle times down to 1.3nsMark Jacunski, Darren Anand, Robert Busch, John Fifield, Matthew Lanahan, Paul Lane, Adrian Paparelli, Gary Pomichter, Dale Pontius, Michael Roberge, Stephen Sliva. cicc 2010: 1-4 [doi]

2007

A 1.0GHz multi-banked embedded DRAM in 65nm CMOS featuring concurrent refresh and hierarchical BISTDarren Anand, Jim Covino, Jeffrey Dreibelbis, John Fifield, Kevin Gorman, Mark Jacunski, Jake Paparelli, Gary Pomichter, Dale Pontius, Michael Roberge, Stephen Sliva. cicc 2007: 795-798 [doi]

2006

Low Cost Test of High Bandwidth Embedded MemoriesKevin W. Gorman, Darren Anand, Gary Pomichter, William R. Corbin. cicc 2006: 445-448 [doi]

2005

A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipeliningJohn E. Barth Jr., Darren Anand, Steve Burns 0001, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Michael R. Nelms, Erik Nelson, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Stephen Sliva. jssc, 40(1):213-222, 2005. [doi]

2004

Generating At-Speed Array Fail Maps with Low-Speed ATEMichael R. Nelms, Kevin Gorman, Darren Anand. vts 2004: 87-96 [doi]

2003

2002

Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offeringJohn E. Barth Jr., Jeffrey Dreibelbis, Eric A. Nelson, Darren Anand, Gary Pomichter, Peter Jakobsen, Michael R. Nelms, Jeffrey Leach, George M. Belansek. ibmrd, 46(6):675-690, 2002. [doi]

2001

Embedded DRAM built in self test and methodology for test insertionPeter Jakobsen, Jeffrey Dreibelbis, Gary Pomichter, Darren Anand, John E. Barth Jr., Michael R. Nelms, Jeffrey Leach, George M. Belansek. itc 2001: 975-984

Shared fuse macro for multiple embedded memory devices with redundancyMichael R. Ouellette, Darren Anand, Peter Jakobsen. cicc 2001: 191-194 [doi]

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