Accurate delay model and experimental verification for current/voltage mode on-chip interconnects

Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III. Accurate delay model and experimental verification for current/voltage mode on-chip interconnects. In ISCAS (3). pages 169-172, 2003. [doi]

@inproceedings{BashirullahLC03:1,
  title = {Accurate delay model and experimental verification for current/voltage mode on-chip interconnects},
  author = {Rizwan Bashirullah and Wentai Liu and Ralph K. Cavin III},
  year = {2003},
  doi = {10.1109/ISCAS.2003.1206221},
  url = {http://dx.doi.org/10.1109/ISCAS.2003.1206221},
  researchr = {https://researchr.org/publication/BashirullahLC03%3A1},
  cites = {0},
  citedby = {0},
  pages = {169-172},
  booktitle = {ISCAS (3)},
}