Integrated approach to area-time tradeoff for built-in-self-test in VLSI circuits - researchr publication authors

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Anupam Basu, Thomas Charles Wilson, Dilip K. Banerji, Jayanti C. Majithia. Integrated approach to area-time tradeoff for built-in-self-test in VLSI circuits. In First Great Lakes Symposium on VLSI, 1991, Kalamazoo, MI, USA, March 1-2, 1991. pages 340-341, IEEE, 1991. [doi]

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