Giulia Beanato, Igor Loi, Giovanni De Micheli, Yusuf Leblebici, Luca Benini. 3D-LIN: A configurable low-latency interconnect for multi-core clusters with 3D stacked L1 memory. In Srinivas Katkoori, Matthew R. Guthaus, Ayse Kivilcim Coskun, Andreas Burg, Ricardo Reis, editors, 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012. pages 30-35, IEEE, 2012. [doi]
Abstract is missing.