A. J. W. M. ten Berg. Floorplan Optimized Topological Partitioning of Programmed Logic Arrays. In Gabriele Saucier, Jacques Trilhe, editors, Synthesis for Control Dominated Circuits, Selected papers from the IFIP WG10.2/WG10.5 Workshops, Grenoble, France, April and September, 1992. Volume A-22 of IFIP Transactions, pages 399-411, North-Holland, 1992.
Abstract is missing.