A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes

Nguyen-Ngoc Bình, Masaharu Imai, Yoshinori Takeuchi. A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes. In ASP-DAC. pages 367-372, 1998.

Authors

Nguyen-Ngoc Bình

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Masaharu Imai

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Yoshinori Takeuchi

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