An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization

Henry Block, Tsutomu Maruyama. An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization. In Marco D. Santambrogio, Diana Göhringer, Dirk Stroobandt, Nele Mentens, Jari Nurmi, editors, 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017. pages 1-8, IEEE, 2017. [doi]

Abstract

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