An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs

Mrinal Bose, Prashant Naphade, Jayanta Bhadra, Hillel Miller. An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs. In 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA. pages 377-381, IEEE, 2009. [doi]

Abstract

Abstract is missing.