Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Zhikuang Cai, Haobo Xu, Shanwen Hu, Jun Yang. Built-in jitter measurement circuit for PLL based on variable vernier delay line. IEICE Electronic Express, 14(3):20161116, 2017. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Delaying Variable Binding Commitments in PlanningQiang Yang, Alex Y. M. Chan. aips 1994: 182-187 On-chip long-term jitter measurement for PLL based on undersampling techniqueZhikuang Cai, Haobo Xu, Shixuan Que, Weiwei Shan, Jun Yang. ieiceee, 10(24):20130887, 2013. [doi]
The following publications are possibly variants of this publication: