On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress

Fabrice Caignet, Nicolas Nolhier, M. Bafleur, A. Wang, Nicolas Mauran. On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress. Microelectronics Reliability, 53(9-11):1278-1283, 2013. [doi]

@article{CaignetNBWM13,
  title = {On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress},
  author = {Fabrice Caignet and Nicolas Nolhier and M. Bafleur and A. Wang and Nicolas Mauran},
  year = {2013},
  doi = {10.1016/j.microrel.2013.07.056},
  url = {http://dx.doi.org/10.1016/j.microrel.2013.07.056},
  researchr = {https://researchr.org/publication/CaignetNBWM13},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {53},
  number = {9-11},
  pages = {1278-1283},
}